Step 2 — Captured regions and CERIG
NSEL,S,LOC,Y,2*plate_t+interface_gap
NSEL,R,LOC,X,bolt_x-head_absorb_r,bolt_x+head_absorb_r
NSEL,R,LOC,Z,bolt_z-head_absorb_r,bolt_z+head_absorb_r
CM,head_dep,NODE
*GET,head_pilot,NODE,0,NUM,MIN
CMSEL,S,head_dep
CERIG,head_pilot,ALLRepeat at y=plate_t for the thread. With SOLID185, ALL is valid: MAPDL uses only the solid's active DOFs. Verify counts of 25+25 before creating the connector.
head_dep and thread_dep selection before CERIG and the 1D connector.